A 20 GHz-band GaAs MMIC receiver module has been developed using 0.15 µm HEMT technology process. It incorporates two front end low noise amplifiers, a double balanced diode mixer, and filters. The RF input frequency ranges 20.1 to 21 GHz and the IF output 1.1 to 2 GHz. Test results show an overall conversion gain of more than 27 dB, and less than a 2.2 dB noise figure. The image-rejection ratio greater than 21 dB has been obtained. The isolation between RF and IF ports is better than 27 dB, and between LO and IF is more than 50 dB.

This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a 0.35 µm SOI (silicon on insulator) CMOS process. The SOI devices have high speed performance even at low operating voltage (below 1 V) because of their smaller parasitic capacitance at source and drain than those of bulk MOSs. A body of a MOSFET can be controlled by using a field shield (FS) plate. The transistor body of the LNA is connected to its gate. The threshold voltage of the transistor becomes lower due to the body-biased effect so that a large drain current keeps the gain high, and active-body control improves the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB gain compression point is +1.5 dBm. The gain and the output power at the 1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively than those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained at the supply voltage of 0.5 V.

The flip-chip structure for millimeter-wave MMICs has been investigated to obtain high performance and high reliability. In our approach, an air gap between the MMIC and the alumina substrate was determined so as not to change electrical characteristics from those of the unflipped MMIC. We calculated the proximity effect between the MMIC and the substrate by using 3D-electromagnetic simulator, and found that the air gap should be controlled to be greater than 20 µm. Since the discontinuity of transmission lines at bump interconnects is not negligible above 60 GHz, we constructed the LCR-equivalent circuit for the bump interconnect and confirmed its validity by comparing measurement with calculation. Based on these investigations, the 60- and 76-GHz-band CPW three-stage low noise amplifiers were successfully mounted on the alumina substrate using a thermal compression bonding process. The gain of the flipped 60- and 76-GHz-band MMICs are greater than 18 dB at around 60 GHz and 17 dB at around 76 GHz, respectively. The noise figures are 3.6 dB and 3.9 dB, respectively. The gain and noise performances showed little degradation compared to those of the unflipped MMICs when appropriate bonding conditions are given. We confirmed that the flip-chip structure has high reliability under a thermal cycle test. From these results, flip-chip technology is promising for millimeter-wave applications.

This paper describes our new technology for creating a highly productive 0. 1 µm gate InGaP/InGaAs HEMT with a GaAs substrate for a millimeter-wave MMIC. We applied a phase-shifting photo lithographic technique and sidewall deposition/etching process to fabricate a 0. 1 µm gate electrode. The fabricated HEMTs showed excellent high-frequency performance; An MSG exceeding 10 dB at 60 GHz. We also fabricated a 60 GHz band, four-stage low-noise amplifier MMIC and demonstrated its superior performance (Gain= 27 dB and NF= 3. 1 dB @61 GHz). These results strongly suggest that our InGaP/InGaAs HEMTs technologies are highly applicable for millimeter-wave applications.

A 1. 5 GHz low noise amplifier (LNA) was designed and fabricated by using CMOS technology. The measured associated gain (Ga) of the LNA is 13. 8 dB, the minimum noise figure (NFmin) is 2. 9 dB and the input-referred third-order intercept point (IIP3) is -2. 5 dBm at 1. 5 GHz. The LNA consumes 8. 6 mA from a 3. 0 V supply voltage. These measured results indicate a potential of short channel MOSFETs for high-frequency and low-noise applications.

A high-gain, low-noise amplifier for microelectrode probe, which integrated multimicroelectrode array for extracellular recording of neural activities and solid state circuits for the amplification of induced signals from the electrodes onto one substrate, was fabricated. In the amplifier, low-noise MOSFETs are used in the first stage, an interstage high-pass filter is incorporated to avoid saturation of the amplifier due to the polarization voltage of the electrode. In the second stage, an operational amplifier incorporating Bi-MOSFETs for the realization of high input impedance and large gain-bandwidth product is used. The gain of the fabricated amplifier is 56 dB for the frequency range between 2 Hz to 10 kHz, the noise voltage is 20µVpp; these satisfied design specifications.